/* 
 * File:   SPIBUS.h
 * Author: chang
 *
 * Created on November 5, 2024, 7:56 AM
 */

#ifndef SPIBUS_H
#define	SPIBUS_H

#ifdef	__cplusplus
extern "C" {
#endif

#include <stdint.h>
#include <stdbool.h>



    
typedef struct {
    uint8_t SPI_Peripheral_No;  //1 for CAN1 or 2 for CAN2
	uint16_t LogicRule; 
    uint8_t Max_Seq_QTY;  // put into here , easily to code
    uint8_t PresentSeqNo;  //eaily to code
    uint16_t Max_ByteQTY4read_Or_write;
    bool Use16bitsBus;
	//uint8_t * pReadData;    //no need to distinguish 16bit and 8 bit spi because we can force (int8_t *) to (int16_t *))
    //uint8_t * pReadData[MAX_SEQ4ALL_SPI_DEVICE];   //because we need to get reading data at the same time *simulink sample time, but poll is 1ms, so reading data will lost due to share)
    volatile uint8_t * * pReadData;    //  pReadData[] length is equal Max of QTY4Read[] and ]QTY4Write[] because we want to story dummy data
    //uint16_t QTY4Read[MAX_SEQ4ALL_SPI_DEVICE];  //actualy need how many to read in current transaction, unit: byte or words , Index is Seq Number  
    uint16_t * QTY4Read;   //unit: byte or word
    //uint8_t * pWriteData;
    //uint8_t * pWriteData[MAX_SEQ4ALL_SPI_DEVICE];  //because we need to prepare writing data at the same time *simulink sample time, data will lost due to share)
    volatile uint8_t * * pWriteData;   //  pWriteData[] length is equal Max of QTY4Read[] and ]QTY4Write[] because we want to story dummy data
    //uint16_t QTY4Write[MAX_SEQ4ALL_SPI_DEVICE];  //actualy need how many to write in current transaction, unit: byte or words, Index is Seq Number   
    uint16_t * QTY4Write;  //unit: byte or word
    uint16_t DummyDataAllOne;  //Bit0 for Seq0, Bit1 for Seq1,... because we need give all spi r/w blocks' Dummy data in simulink
    //void *set_CS[MAX_SEQ4ALL_SPI_DEVICE](bool );  //all functions (every Seq) for enable/disable spi cs.  argument 1: enable, 0:disable
    //void (*set_CS)(bool ); 
    //void (* set_CS[15])(bool);
    void (** set_CS)(bool);
    uint8_t state;  //low layer's state:  physical hardware layer state
}SPIBUS_t;    
    
  
//#Define SPI Start from Simulink
#define PLATFORM_PIC32MIPS
#define SPI1_SEQ_MAX_QTY               4
#define USE_SPI1                       1

extern SPIBUS_t SPI_myObj1;

//#Define SPI End from Simulink
 
//The following definitions are only for polling SPI Bus. We actually use ISR SPI bus, so it is just for passing bulid
typedef struct {
    unsigned SPI1_Polling: 1;
    unsigned SPI2_Polling: 1;
    unsigned SPI3_Polling: 1;
    unsigned SPI4_Polling: 1;
} SPI_Poll_t;
extern SPI_Poll_t POLL_InMain;
#ifdef USE_SPI1 
extern uint8_t LowerLayer_spi_ReturnResult1;
#endif
#ifdef USE_SPI2 
extern uint8_t LowerLayer_spi_ReturnResult2;
#endif
#ifdef USE_SPI3 
extern uint8_t LowerLayer_spi_ReturnResult3;
#endif
#ifdef USE_SPI4 
extern uint8_t LowerLayer_spi_ReturnResult4;
#endif
extern uint8_t SPIWriteRead_lowLayer(SPIBUS_t * pSPIObj);   //For Non-ISR Polling SPI use.  If ISR SPI, it is just for passing compiler



void SPIBUS_init(SPIBUS_t * pSPIMyOBJ, uint8_t SPI_Peripheral_No, bool Use16bitsBus, uint8_t MAxSeq_Qty, uint16_t * QTY4Read, uint16_t * QTY4Write,
        uint16_t Max_ByteQTY4ReadWrite, volatile uint8_t * Room4pReadData[],volatile uint8_t * Room4pWriteData[],void (* set_CS[])(bool));
      

void SPIBUS_Poll(SPIBUS_t * pSPIMyOBJ);


#ifdef	__cplusplus
}
#endif

#endif	/* CANBUS_H */
















































































